HD6413002 Datasheet, PDF (550/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Table 18-7 Timing of On-Chip Supporting Modules (cont)
Condition A:
V_CC = 2.7 V to 5.5 V, AV_CC = 2.7 V to 5.5 V, V_REF = 2.7 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 8 MHz, T_a = –20°C to +75°C (regular specifications),
T_a = –40°C to +85°C (wide-range specifications)
Condition B:
V_CC = 3.0 V to 5.5 V, AV_CC = 3.0 V to 5.5 V, V_REF = 3.0 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 10 MHz, T_a = –20°C to +75°C (regular specifications),
T_a = –40°C to +85°C (wide-range specifications)
Condition C:
V_CC = 5.0 V ± 10%, AV_CC = 5.0 V ± 10%, V_REF = 4.5 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 16 MHz, T_a = –20°C to +75°C (regular specifications),
T_a = –40°C to +85°C (wide-range specifications)
Condition D:
V_CC = 5.0 V ± 10%, AV_CC = 5.0 V ± 10%, V_REF = 4.5 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 17 MHz, T_a = –20°C to +75°C (regular specifications),
T_a = –40°C to +85°C (wide-range specifications)
Condition A Condition B Condition C Condition D
Item
8 MHz
10 MHz
16 MHz
17 MHz
Test
Symbol Min Max Min Max Min Max Min Max Unit Conditions
SCI Transmit data t_TXD — 100 — 100 — 100 – 100 ns Figure 18-24
delay time
Receive data t_RXS 100 — 100 — 100 — 100 –
setup time
(synchronous)
Receive Clock t_RXH 100 — 100 — 100 — 100 –
data hold input
time (syn- _Clock
chronous) _output
0 —0 — 0
—
0
–
Ports Output data
and delay time
t_PWD — 100 — 100 — 100 – 100 ns Figure 18-20
TPC _{Input data}
setup time
t_PRS 50
— 50 — 50
—
50
–
(synchronous)
Input data
hold time
t_PRH 50
— 50 — 50
—
50
–
(synchronous)
H8/3002
output pin
C
5V
C = 90 pF: ports 4, 6, 8,
R_L
A₁₉ to A₀, D₁₅ to D₈ ,
ø, AS, RD, HWR , LWR
C = 30 pF: ports 9, A, B
R_L = 2.4 kΩ
R _H = 12 kΩ
R_H
Input/output timing measurement levels
• Low: 0.8 V
• High: 2.0 V
Figure 18-3 Output Load Circuit
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