HD6413002 Datasheet, PDF (20/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

1.2 Block Diagram
Figure 1-1 shows an internal block diagram.
MD₂
MD₁
MD₀
EXTAL
XTAL
ø
STBY
RES
RESO
NMI
LWR
HWR
RD
AS
P6₂/BACK
P6₁/BREQ
P6₀/WAIT
P8₄/CS₀
P8₃/CS₁/IRQ₃
P8₂/CS₂/IRQ₂
P8₁/CS₃/IRQ₁
P8₀/RFSH/IRQ₀
Data bus
Port 4
Clock
osc.
H8/300H CPU
Interrupt controller
RAM
512 bytes
16-bit
integrated
timer unit
(ITU)
Programmable
timing pattern
controller (TPC)
DMA controller
(DMAC)
Refresh
controller
Watchdog timer
(WDT)
Serial communication
interface
(SCI) × 2 channels
A/D converter
A₁₉
A₁₈
A₁₇
A₁₆
A₁₅
A₁₄
A₁₃
A₁₂
A₁₁
A₁₀
A₉
A₈
A₇
A₆
A₅
A₄
A₃
A₂
A₁
A₀
P9₅/SCK₁/IRQ₅
P9₄/SCK₀/IRQ₄
P9₃/RxD₁
P9₂/RxD₀
P9₁/TxD₁
P9₀/TxD₀
Port B
Port A
Port 7
Figure 1-1 Block Diagram
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