HD6413002 Datasheet, PDF (28/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Table 1-3 Pin Functions (cont)
Type
System
control
Symbol
RES
RESO
Pin No.
FP-100B,
TFP-100B FP-100A
63
65
10
12
STBY
62
64
BREQ
59
61
BACK
60
62
Interrupts NMI
64
66
Address
bus
IRQ₅ to
IRQ₀
17, 16,
90 to 87
Modes A₁₉ to 56 to 45,
1 and 2 A₀ 43 to 36
Modes A₂₃ to 100 to 97,
3 and 4 A₀ 56 to 45,
43 to 36
Data bus D₁₅ to D₀
Bus control CS₃ to CS₀
AS
34 to 23,
21 to 18
91 to 88
69
19, 18
92 to 89
58 to 47
45 to38
99, 100,
1, 2,
58 to 47
45 to 38
36 to 25
23 to 20
90 to 93
71
RD
70
72
HWR
71
73
LWR
72
74
WAIT
58
60
I/O
Input
Output
Input
Input
Output
Input
Input
Output
Input/
output
Output
Output
Output
Output
Output
Input
Name and Function
Reset input: When driven low, this pin
resets control the H8/3002
Reset output: Outputs the reset signal
generated by the watchdog timer to external
devices.
Standby: When driven low, this pin forces a
transition to hardware standby mode
Bus request: Used by an external bus
master to request the bus right from the
H8/3002
Bus request acknowledge: Indicates that
the bus has been granted to an external bus
master
Nonmaskable interrupt: Requests a
nonmaskable interrupt
Interrupt request 5 to 0: Maskable
interrupt request pins
Address bus: Outputs address signals
Data bus: Bidirectional data bus
Chip select: Select signals for areas 3 to 0
Address strobe: Goes low to indicate valid
address output on the address bus
Read: Goes low to indicate reading from the
external address space
High write: Goes low to indicate writing to
the external address space; indicates valid
data on the upper data bus (D₁₅ to D₈).
Low write: Goes low to indicate writing to
the external address space; indicates valid
data on the lower data bus (D₇ to D₀).
Wait: Requests insertion of wait states in
bus cycles during access to the external
address space
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