HD6413002 Datasheet, PDF (509/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

14.5 Interrupts
The A/D converter generates an interrupt (ADI) at the end of A/D conversion. The ADI interrupt
request can be enabled or disabled by the ADIE bit in ADCSR.
14.6 Usage Notes
When using the A/D converter, note the following points:
1. Analog Input Voltage Range: During A/D conversion, the voltages input to the analog input
pins should be in the range AV_SS ≤ AN_n ≤ V_REF.
2. Relationships of AV_CC and AV_SS to V_CC and V_SS: AV_CC, AV_SS, V_CC, and V_SS should be
related as follows: AV_SS = V_SS. AV_CC and AV_SS must not be left open, even if the A/D
converter is not used.
3. V_REF Programming Range: The reference voltage input at the V_REF pin should be in the
range V_REF ≤ AV_CC.
Failure to observe points 1, 2, and 3 above may degrade chip reliability.
4. Note on Board Design: In board layout, separate the digital circuits from the analog circuits
as much as possible. Particularly avoid layouts in which the signal lines of digital circuits
cross or closely approach the signal lines of analog circuits. Induction and other effects may
cause the analog circuits to operate incorrectly, or may adversely affect the accuracy of A/D
conversion.
The analog input signals (AN₀ to AN₇), analog reference voltage (V_REF), and analog supply
voltage (AV_CC) must be separated from digital circuits by the analog ground (AV_SS). The
analog ground (AV_SS) should be connected to a stable digital ground (V_SS) at one point on
the board.
5. Note on Noise: To prevent damage from surges and other abnormal voltages at the analog
input pins (AN₀ to AN₇) and analog reference voltage pin (V_REF), connect a protection circuit
like the one in figure 14-7 between AV_CC and AV_SS. The bypass capacitors connected to
AV_CC and V_REF and the filter capacitors connected to AN₀ to AN₇ must be connected to
AV_SS. If filter capacitors like the ones in figure 14-7 are connected, the voltage values input
to the analog input pins (AN₀ to AN₇) will be smoothed, which may give rise to error. Error
can also occur if A/D conversion is frequently performed in scan mode so that the current that
charges and discharges the capacitor in the sample-and-hold circuit of the A/D converter
becomes greater than that input to the analog input pins via input impedance Rin. The circuit
constants should therefore be selected carefully.
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