HD6413002 Datasheet, PDF (380/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

Contention between TCNT Write and Overflow or Underflow: If an overflow occurs in the T₃
state of a TCNT write cycle, writing takes priority and the counter is not incremented. OVF is
set to 1.The same holds for underflow. See figure 10-65.
TCNT write cycle
T₁
T₂
T₃
ø
Address
TCNT address
Internal write signal
TCNT input clock
Overflow signal
TCNT
OVF
H'FFFF
M
TCNT write data
Figure 10-65 Contention between TCNT Write and Overflow
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