HD6413002 Datasheet, PDF (559/700 Pages) Renesas Technology Corp – High-performance single-chip microcontroller

ø
A₉ to A₁
AS
CS3 (RAS)
HWR (UCAS),
LWR (LCAS)
RD (WE)
RFSH
T₁
T₂
t_ASD
t_CSR
t_ASD
t_RAD2
t_RAD2
t_CSR
T₃
t_SD
t_RAD3
t_SD
t_RAD3
Figure 18-11 DRAM Bus Timing (Refresh Cycle): Three-State Access
— 2CAS Mode —
ø
CS3 (RAS)
t_CSR
HWR (UCAS),
t_CSR
LWR (LCAS)
RFSH
Figure 18-12 DRAM Bus Timing (Self-Refresh Mode)
— 2CAS Mode —
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