M1A3P1000-1PQ208M Datasheet, PDF (87/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology

Military ProASIC3/EL Low Power Flash FPGAs
3.3 V PCI, 3.3 V PCI-X
Peripheral Component Interface for 3.3 V standard specifies support for 33 MHz and 66 MHz PCI Bus
applications.
Table 2-113 • Minimum and Maximum DC Input and Output Levels
3.3 V PCI/PCI-X
Drive Strength
VIL
Min. Max.
V
V
VIH
Min. Max.
V
V
VOL
Max.
V
VOH
Min.
V
I_OL I_OH
mA mA
I_OSL
Max.
mA³
I_OSH
Max.
mA³
I_IL1 I_IH2
µA⁴ µA⁴
Per PCI specification
Per PCI curves
15 15
Notes:
1. I_IL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. I_IH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges
3. Currents are measured at 100°C junction temperature and maximum voltage.
4. Currents are measured at 125°C junction temperature.
AC loadings are defined per the PCI/PCI-X specifications for the database; Microsemi loadings for
enable path characterization are described in Figure 2-15.
R = 25
Test Point
Datapath
R to VCCI for t_DP (F)
R to GND for t_DP (R)
10 pF
R=1k
Test Point
Enable Path
R to VCCI for t_LZ / t_ZL / t_ZLS
R to GND for t_HZ / t_ZH / t_ZHS
10 pF for t_ZH / t_ZHS / t_ZL / t_ZLS
5 pF for t_HZ / t_LZ
Figure 2-15 • AC Loading
AC loadings are defined per PCI/PCI-X specifications for the datapath; Microsemi loading for tristate is
described in Table 2-114.
Table 2-114 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (Typ) (V)
0
Note:
3.3
0.285 * VCCI for t_DP(R)
0.615 * VCCI for t_DP(F)
*Measuring point = V_trip. See Table 2-28 on page 2-27 for a complete table of trip points.
C_LOAD (pF)
10
Revision 3
2- 73