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M1A3P1000-1PQ208M Datasheet, PDF (30/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology
Military ProASIC3/EL DC and Switching Characteristics
Table 2-20 • Different Components Contributing to Dynamic Power Consumption in Military ProASIC3 and
ProASIC3/EL Devices at 1.5 V VCC
Device-Specific Dynamic Power (µW/MHz)
Parameter
Definition
A3PE3000L A3PE600L A3P1000 A3P250
PAC1
Clock contribution of a Global Rib
13.03
6.24
14.50
11.00
PAC2
Clock contribution of a Global Spine
6.69
3.47
2.48
1.58
PAC3
Clock contribution of a VersaTile row
1.46
1.46
0.81
0.81
PAC4
Clock contribution of a VersaTile used as a 0.13
0.13
0.12
0.12
sequential module
PAC5
First contribution of a VersaTile used as a
0.07
sequential module
PAC6
Second contribution of a VersaTile used as a
0.29
sequential module
PAC7
Contribution of a VersaTile used as a
0.29
combinatorial Module
PAC8
Average contribution of a routing net
0.70
PAC9
Contribution of an I/O input pin (standard- See Table 2-13 on page 2-11 through Table 2-15 on
dependent)
page 2-12.
PAC10
Contribution of an I/O output pin (standard- See Table 2-16 on page 2-13 through Table 2-18 on
dependent)
page 2-14.
PAC11
Average contribution of a RAM block during a
read operation
25.00
PAC12
Average contribution of a RAM block during a
write operation
30.00
PAC13
Dynamic contribution for PLL
2.60
Table 2-21 • Different Components Contributing to the Static Power Consumption in Military ProASIC3/EL
Devices
Device-Specific Dynamic Power (µW)
Parameter
Definition
A3PE3000L A3PE600L A3P1000 A3P250
PDC0
Array static power in Sleep mode
0 mW
0 mW
N/A
N/A
PDC1
Array static power in Active mode
See Table 2-11 on page 2-10.
PDC2
Array static power in Static (Idle) mode
See Table 2-11 on page 2-10.
PDC3
Array static power in Flash*Freeze mode
See Table 2-8 on page 2-9.
PDC4
Static PLL contribution at 1.2 V operating core
1.42 mW
N/A
voltage (for A3PE600L and A3PE3000L only)
Static PLL contribution 1.5 V operating core
voltage
2.55 mW
PDC5
Bank quiescent power (VCCI-dependent)
See Table 2-8 on page 2-9, Table 2-9 on page 2-9,
Table 2-11 on page 2-10.
PDC6
I/O input pin static power (standard-dependent)
See Table 2-13 on page 2-11. through Table 2-15 on
page 2-12.
PDC7
I/O output pin static power (standard-dependent) See Table 2-16 on page 2-13 through Table 2-18 on
page 2-14.
Note: For a different output load, drive strength, or slew rate, Microsemi recommends using the Microsemi
power spreadsheet calculator or SmartPower tool in Libero® Integrated Design Environment (IDE).
2-16
Revision 3