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M1A3P1000-1PQ208M Datasheet, PDF (35/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology
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PAD
Military ProASIC3/EL Low Power Flash FPGAs
tPY
tDIN
DQ
Y
DIN
CLK
To Array
tPY = MAX(tPY(R), tPY(F))
tDIN = MAX(tDIN(R), tDIN(F))
I/O Interface
VIH
PAD
Vtrip
Vtrip
VIL
VCC
Y
GND
50%
tPY
(R)
50%
tPY
(F)
DIN
GND
50%
tDOUT
(R)
VCC
tDOUT
(F)
Figure 2-5 • Input Buffer Timing Model and Delays (example)
50%
Revision 3
2- 21
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