 English |
|
|
|
|
|
|
|
| M1A3P1000-1PQ208M Datasheet, PDF (34/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology | |||
| |||
| ◁ |
Military ProASIC3/EL DC and Switching Characteristics
User I/O Characteristics
Timing Model
LVPECL
I/O Module
(Registered)
tPY = 1.84 ns
DQ
Input LVTTL
Clock
ttIISCULKDQ==00.3.363nnss
tPY = 1.49 ns
I/O Module
(Non-Registered)
LVDS,
B-LVDS,
M-LVDS
tPY = 2.11 ns
Combinational Cell
Y
I/O Module
(Non-Registered)
Combinational Cell
Y
LVPECL
tPD = 0.78 ns
Combinational Cell
tPD = 0.67 ns
tDP = 1.51 ns
I/O Module
(Non-Registered)
Y
tPD = 1.21 ns
tDP = 2.09 ns
LVTTL Output Drive Strength = 12 mA
High Slew Rate
Combinational Cell
I/O Module
(Non-Registered)
Y
tPD = 0.70 ns
Combinational Cell
tDP = 2.38 ns
LVTTL Output Drive Strength = 8 mA
High Slew Rate
I/O Module
(Non-Registered)
Y
tPD = 0.65 ns
tDP = 2.84 ns
LVCMOS 1.5 V Output Drive Strength = 4 mA
High Slew Rate
Register Cell Combinational Cell Register Cell
DQ
Y
DQ
tPD = 0.65 ns
I/O Module
(Registered)
DQ
LVTTL 3.3 V Output Drive
Strength = 12 mA
tDP = 2.09 ns High Slew Rate
tCLKQ = 0.76 ns
tSUD = 0.59 ns
Input LVTTL
Clock
tCLKQ = 0.76 ns
tSUD = 0.9 ns
Input LVTTL
Clock
tOCLKQ = 0.81 ns
tOSUD = 0.43 ns
tPY = 1.49 ns
tPY = 1.49 ns
Figure 2-4 ⢠Timing Model
Operating Conditions: â1 Speed, Military Temperature Range (TJ = 125°C), Worst-Case
VCC = 1.14 V (example for A3PE3000L and A3PE600L)
2-20
Revision 3
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese