M1A3P1000-1PQ208M Datasheet, PDF (59/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology

Military ProASIC3/EL Low Power Flash FPGAs
3.3 V LVCMOS Wide Range
Table 2-57 • Minimum and Maximum DC Input and Output Levels
Applicable to Pro I/O Banks for A3PE600L and A3PE3000L Only
3.3 V
Equiv.
LVCMOS Software
Wide Range Default
Drive
Drive
Strength
Strength
Option¹
VIL
Min. Max.
V
V
VIH
Min. Max.
V
V
VOL
Max.
V
VOH IOL IOH IOSL IOSH IIL² IIH³
Min.
V
Max. Max.
µA µA mA⁴ mA⁴ µA⁵ µA⁵
100 µA
2 mA –0.3 0.8
2
3.6 0.2 VCCI – 0.2 100 100 25
27 15 15
100 µA
4 mA –0.3 0.8
2
3.6 0.2 VCCI – 0.2 100 100 25
27 15 15
100 µA
6 mA –0.3 0.8
2
3.6 0.2 VCCI – 0.2 100 100 51
54 15 15
100 µA
12 mA –0.3 0.8
2
3.6 0.2 VCCI – 0.2 100 100 103 109 15 15
100 µA
16 mA –0.3 0.8
2
3.6 0.2 VCCI – 0.2 100 100 132 127 15 15
100 µA
24 mA –0.3 0.8
2
3.6 0.2 VCCI – 0.2 100 100 268 181 15 15
Notes:
1. Note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will not operate at the
equivalent software default drive strength. These values are for normal ranges only.
2. I_IL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
3. I_IH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges
4. Currents are measured at 125°C junction temperature.
5. All LVMCOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-A specification.
6. Software default selection highlighted in gray.
Table 2-58 • Minimum and Maximum DC Input and Output Levels
Applicable to Advanced I/O Banks
3.3 V LVCMOS
Wide Range
Drive Strength
Equiv.
Software
Default
Drive
Strength
Option¹
VIL
VIH
VOL
Min. Max. Min. Max. Max.
V
VVV
V
VOH
Min.
V
IOL IOH IOSL IOSH IIL² IIH³
Max. Max.
µA µA mA⁴ mA⁴ µA⁵ µA⁵
100 µA
2 mA –0.3 0.8 2 3.6 0.2 VCCI – 0.2 100 100 25
27 15 15
100 µA
4 mA –0.3 0.8 2 3.6 0.2 VCCI – 0.2 100 100 25
27 15 15
100 µA
6 mA –0.3 0.8 2 3.6 0.2 VCCI – 0.2 100 100 51
54 15 15
100 µA
8 mA –0.3 0.8 2 3.6 0.2 VCCI – 0.2 100 100 51
54 15 15
100 µA
12 mA –0.3 0.8 2 3.6 0.2 VCCI – 0.2 100 100 103 109 15 15
100 A
16 mA –0.3 0.8 2 3.6 0.2 VCCI – 0.2 100 100 132 127 15 15
Notes:
1. Note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will NOT operate at
the equivalent software default drive strength. These values are for Normal Ranges ONLY.
2. I_IL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
3. I_IH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges
4. Currents are measured at 125°C junction temperature.
5. All LVMCOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-A specification.
6. Software default selection highlighted in gray.
Revision 3
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