M1A3P1000-1PQ208M Datasheet, PDF (153/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology

Military ProASIC3/EL Low Power Flash FPGAs
WCLK
FULL
AFULL
t_CYC
t_CKAF
t_WCKFF
(Address CWouAn/tRerA) ^{NO MATCH}
NO MATCH
Figure 2-53 • FIFO FULL Flag and AFULL Flag Assertion
Dist = AFF_TH
MATCH (FULL)
WCLK
WA/RA MATCH
(Address Counter) (EMPTY)
NO MATCH
RCLK
1st Rising
Edge
After 1st
Write
NO MATCH
2nd Rising
Edge
After 1st
Write
t_RCKEF
EMPTY
NO MATCH
AEMPTY
NO MATCH
Dist = AEF_TH + 1
t_CKAF
Figure 2-54 • FIFO EMPTY Flag and AEMPTY Flag Deassertion
RCLK
WA/RA
(Address Counter)
WCLK
MATCH (FULL)
NO MATCH
1st Rising
Edge
After 1st
Read
FULL
NO MATCH
1st Rising
Edge
After 2nd
Read
t_WCKF
NO MATCH
AFULL
Figure 2-55 • FIFO FULL Flag and AFULL Flag Deassertion
NO MATCH
Dist = AFF_TH – 1
t_CKAF
Revision 3
2- 139