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M1A3P1000-1PQ208M Datasheet, PDF (85/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology
Military ProASIC3/EL Low Power Flash FPGAs
1.2 V LVCMOS Wide Range
Table 2-109 • Minimum and Maximum DC Input and Output Levels
Applicable to Pro I/O Banks for A3PE600L and A3PE3000L Operating at 1.2 V Core Voltage
1.2 V
Equiv.
LVCMOS Software
Wide Range1 Default
Drive
Drive
Strength
Strength Min.
Option2 V
VIL
Max.
V
VIH
Min.
V
Max.
V
VOL
Max.
V
VOH
Min.
V
IOL IOH IOSH IOSL IIL3 IIH4
Max. Max.
µA µA mA5 mA5 µA6 µA6
100 µA
2 mA –0.3 0.3 * VCCI 0.7 * VCCI 3.6 0.25 * VCCI 0.75 * VCCI 100 100 TBD TBD 15 15
Notes:
1. Applicable to A3PE600L and A3PE3000L devices only.
2. Note that 1.2 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will not operate at the
equivalent software default drive strength. These values are for normal ranges only.
3. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
4. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
larger when operating outside recommended ranges
5. Currents are measured at 100°C junction temperature and maximum voltage.
6. Currents are measured at 125°C junction temperature.
7. Software default selection highlighted in gray.
Test Point
Datapath
5 pF
R=1k
Test Point
Enable Path
R to VCCI for tLZ / tZL / tZLS
R to GND for tHZ / tZH / tZHS
5 pF for tZH / tZHS / tZL / tZLS
5 pF for tHZ / tLZ
Figure 2-14 • AC Loading
Table 2-110 • AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (Typ) (V)
0
1.2
0.6
–
Note: *Measuring point = Vtrip. See Table 2-28 on page 2-27 for a complete table of trip points.
CLOAD (pF)
5
Revision 3
2- 71