M1A3P1000-1PQ208M Datasheet, PDF (38/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology

Military ProASIC3/EL DC and Switching Characteristics
Overview of I/O Performance
Summary of I/O DC Input and Output Levels – Default I/O Software
Settings
Table 2-24 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Military Conditions—Software Default Settings
Applicable to Pro I/Os for A3PE600L and A3PE3000L Only
I/O Standard
Equiv.
Software
Default
Drive
Drive Strength Slew Min.
Strength Option¹ Rate V
VIL
Max.
V
VIH
VOL
Min.
V
Max. Max.
V
V
VOH
I_OL2 I_OH2
Min.
V
mA mA
3.3 V LVTTL / 3.3 12 mA 12 mA High –0.3
0.8
V LVCMOS
2
3.6
0.4
2.4
12 12
3.3 V LVCMOS 100 µA 12 mA High –0.3
0.8
Wide Range^1,3
2
3.6
0.2
VCCI – 0.2 0.1 0.1
2.5 V LVCMOS 12 mA 12mA High –0.3
0.7
1.7
3.6
0.7
1.7
12 12
1.8 V LVCMOS 12 mA 12 mA High –0.3 0.35 * VCCI 0.65 * VCCI 3.6
0.45 VCCI – 0.45 12 12
1.5 V LVCMOS 12 mA 12 mA High –0.3 0.35 * VCCI 0.65 * VCCI 3.6 0.25 * VCCI 0.75 * VCCI 12 12
1.2 V LVCMOS^4,5 2 mA 2 mA High –0.3 0.35 * VCCI 0.65 * VCCI 3.6 0.25 * VCCI 0.75 * VCCI 2 2
1.2 V LVCMOS 100 µA 2 mA High –0.3 0.3 * VCCI 0.7 * VCCI 3.6
0.1
VCCI – 0.1 0.1 0.1
Wide Range^1,4,5
3.3 V PCI
Per PCI Specification
3.3 V PCI-X
3.3 V GTL
2.5 V GTL
Per PCI-X Specification
20 mA⁶ 20 mA High –0.3 VREF – 0.05 VREF + 0.05 3.6
0.4
20 mA⁶ 20 mA High –0.3 VREF – 0.05 VREF + 0.05 3.6
0.4
–
20 20
–
20 20
3.3 V GTL+
35 mA 35 mA High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.6
–
35 35
2.5 V GTL+
33 mA 33 mA High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.6
–
33 33
HSTL (I)
HSTL (II)
8 mA 8 mA High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.4
VCCI – 0.4 8 8
15 mA⁶ 15 mA⁶ High –0.3 VREF – 0.1 VREF + 0.1 3.6
0.4
VCCI – 0.4 15 15
SSTL2 (I)
15 mA 15 mA High –0.3 VREF – 0.2 VREF + 0.2 3.6 0.54 VCCI – 0.62 15 15
SSTL2 (II)
18 mA 18 mA High –0.3 VREF – 0.2 VREF + 0.2 3.6 0.35 VCCI – 0.43 18 18
SSTL3 (I)
14 mA 14 mA High –0.3 VREF – 0.2 VREF + 0.2 3.6
0.7
VCCI – 1.1 14 14
SSTL3 (II)
21 mA 21 mA High –0.3 VREF – 0.2 VREF + 0.2 3.6
0.5
VCCI – 0.9 21 21
Notes:
1. Note that 1.2 V LVCMOS and 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration
will not operate at the equivalent software default drive strength These values are for normal ranges only.
2. Currents are measured at 125°C junction temperature.
3. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD-8B specification.
4. Applicable to A3PE600L and A3PE3000L devices operating at VCCI VCC.
5. All LVCMOS 1.2 V software macros support LVCMOS 1.2 V wide range as specified in the JESD8-12 specification.
6. Output drive strength is below JEDEC specification.
7. Output slew rate can be extracted using the IBIS Models.
2-24
Revision 3