M1A3P1000-1PQ208M Datasheet, PDF (29/212 Pages) Microsemi Corporation – Military ProASIC3/EL Low Power Flash FPGAs with Flash*Freeze Technology

Military ProASIC3/EL Low Power Flash FPGAs
Power Consumption of Various Internal Resources
Table 2-19 • Different Components Contributing to Dynamic Power Consumption in Military ProASIC3/EL
Devices Operating at 1.2 V VCC
Device-Specific Dynamic Power
(µW/MHz)
Parameter
Definition
A3PE3000L
A3PE600L
PAC1
Clock contribution of a Global Rib
8.34
3.99
PAC2
Clock contribution of a Global Spine
4.28
2.22
PAC3
Clock contribution of a VersaTile row
0.94
0.94
PAC4
Clock contribution of a VersaTile used as a sequential
0.08
0.08
module
PAC5
First contribution of a VersaTile used as a sequential module
0.05
PAC6
Second contribution of a VersaTile used as a sequential
0.19
module
PAC7
Contribution of a VersaTile used as a combinatorial module
0.11
PAC8
Average contribution of a routing net
0.45
PAC9
Contribution of an I/O input pin (standard-dependent)
See Table 2-13 on page 2-11
through Table 2-15 on page 2-12.
PAC10
Contribution of an I/O output pin (standard-dependent)
See Table 2-16 on page 2-13
through Table 2-18 on page 2-14.
PAC11
Average contribution of a RAM block during a read operation
25.00
PAC12
Average contribution of a RAM block during a write operation
30.00
PAC13
Dynamic contribution for PLL
1.74
Revision 3
2- 15