82830MP Datasheet, PDF (81/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel^® 830MP Chipset
R
4.5.1.37
BUFF_SC – System Memory Buffer Strength Control Register - Device #0
Address Offset:
Default Value:
Access:
Size
EC-EFh
00000000h
Read/Write
32 bits
4.5.1.37.1
SDR Drive Strength Register Description
The System Memory Buffer Strength Control Register programs drive strengths and slew rate and for
each buffer category based on loading detected by SPD. CS#, CKE, and CLK buffers have independent
control for each SO-DIMM and are programmed to the same strength for front and back side of each
SO-DIMM. If the BIOS detects different loading on the backside of the SO-DIMM (i.e. 96 MB), it
should ignore the devices on the backside of the SO-DIMM.
Bit
31
30
29
28
27
26
25
24
23:21
20:18
Descriptions
Reserved
CLK[3:2] Slew Rate. This field sets the slew rate of the CLK[3:2] pins.
0 = Normal slew rate.
1 = Fast slew rate for reduced Tco.
Default Value=0.
CLK[1:0] Slew Rate. This field sets the slew rate of the CLK[1:0] pins.
0 = Normal slew rate.
1 = Fast slew rate for reduced Tco.
Default Value=0.
Reserved
CS[3:2]#, CKE[3:2] Slew Rate. This field sets the slew rate of the CS[3:2]#, CKE[3:2] pins.
0 = Normal slew rate.
1 = Fast slew rate for reduced Tco.
Default Value=0.
CS[1:0]#, CKE[1:0] Slew Rate. This field sets the slew rate of the CS[1:0]#, CKE[1:0] pins.
0 = Normal slew rate.
1 = Fast slew rate for reduced Tco.
Default Value=0.
DQ[63:0], DQM[7:0] Slew Rate. This field sets the slew rate of the DQ[63:0], DQM[7:0] pins.
0 = Normal slew rate.
1 = Fast slew rate for reduced Tco.
Default Value=0.
MA[12:0], BA[1:0], RAS#, CAS#, WE# Slew Rate. This field sets the slew rate of the MA[12:0],
BA[1:0], RAS#, CAS#, WE# pins.
0 = Normal slew rate.
1 = Fast slew rate for reduced Tco.
Default Value=0.
Reserved
CLK[3:2] Buffer Strength. This field sets the buffer strength of the CLK[3:2] pins.
000 = 0.75X
001 = 1X
298338-001
Datasheet
81