82830MP Datasheet, PDF (107/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel^® 830MP Chipset
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Table 25. Host Bus Transactions Supported by GMCH-M
Transaction
REQa[4:0]# REQb[4:0]# GMCH-M Support
Deferred Reply
00000
Reserved
Interrupt Acknowledge
00001
01000
Special Transactions
Reserved
Reserved
Branch Trace
Message
Reserved
Reserved
Reserved
I/O Read
01000
01000
01000
01001
01001
01001
01001
10000
I/O Write
10001
Reserved
Memory Read &
Invalidate
1100x
00010
Reserved
Memory Code Read
Memory Data Read
00011
00100
00110
Memory Write (no
retry)
00101
Memory Write (can be
retried)
00111
XXXXX
XXXXX
00000
00001
0001x
001xx
00000
00001
0001x
001xx
0 0 x LEN#
0 0 x LEN#
00xxx
0 0 x LEN#
0 0 x LEN#
0 0 x LEN#
0 0 x LEN#
0 0 x LEN#
0 0 x LEN#
The GMCH-M will initiate a deferred reply for a
previously deferred transaction.
Reserved
Interrupt acknowledge cycles are forwarded to the hub
interface bus.
See Table 27 in Special Cycles section.
Reserved
Reserved
The GMCH-M will terminate a branch trace message
without latching data.
Reserved
Reserved
Reserved
I/O read cycles are forwarded to hub interface or
AGP/PCI unless they target the GMCH-M configuration
space. In this case, the GMCH-M picks up the
transaction.
I/O write cycles are forwarded to hub interface or
AGP/PCI unless they target the GMCH-M configuration
space. In this case, the GMCH-M picks up the
transaction.
Reserved
Host initiated memory read and invalidate cycles are
forwarded to system SDRAM, hub interface, AGP/PCI,
Graphics RDRAM, or Graphics Memory Mapped
Registers. The GMCH-M will initiate an MRI (LEN=0)
cycle to snoop a hub interface or AGP/PCI, to system
SDRAM.
Reserved
Memory code read cycles are forwarded to system
SDRAM, hub interface, or AGP/PCI.
Host initiated memory read cycles are forwarded to
system SDRAM, hub interface, AGP/PCI, Graphics
RDRAM or Graphics Memory Mapped Registers. The
GMCH-M will initiate a memory read cycle to snoop a
hub interface, or AGP/PCI to system SDRAM.
This memory write is a writeback cycle and cannot be
retried. The GMCH-M will forward the write to system
SDRAM.
The memory write cycle will be forwarded to system
SDRAM, hub interface, AGP/PCI, or Graphics Memory
Mapped Registers.
298338-001
Datasheet
107