82830MP Datasheet, PDF (46/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel® 830MP Chipset
R
4.5.1
SDRAM Controller/Host-hub Interface Device Registers -
Device #0
Table 19 shows the GMCH-M configuration space for device #0. An “s” in the Default Value field
means that a strap determines the power-up default value for that bit.
Table 19. Host-Hub I/F Bridge/SDRAM Controller Configuration Space (Device #0)
Address
Offset
Register
Symbol
Register Name
Default Value
00-01h
02-03h
04-05h
06-07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10-13h
14-2Bh
2C-2Dh
2E-2Fh
30-33h
34h
35-3Fh
40-44h
45-47h
48-4Bh
4C-4Fh
50-51h
52-53h
54-55h
56-57h
58h
59-5Fh
VID
DID
PCICMD
PCISTS
RID
-
SUBC
BCC
-
MLT
HDR
-
APBASE
-
SVID
SID
-
CAPPTR
-
-
-
RRBAR
-
GCC0
GCC1
-
-
FDHC
PAM[6:0]
Vendor Identification
Device Identification
PCI Command Register
PCI Status Register
Revision Identification
Intel Reserved
Sub-Class Code
Base Class Code
Intel Reserved
Master Latency Timer
Header Type
Intel Reserved
Aperture Base Configuration
Intel Reserved
Subsystem Vendor Identification
Subsystem Identification
Intel Reserved
Capabilities Pointer
Intel Reserved
Intel Reserved
Intel Reserved
Register Range Base Address
Intel Reserved
GMCH Control Register 0
GMCH Control Register 1
Intel Reserved
Intel Reserved
Fixed DRAM Hole Control
Programmable Attribute Map (7
registers)
8086h
3575h
0006h
0010h
00h
-
00h
06h
-
00h
00h
-
00000008h
-
00h
00h
-
40h
-
-
-
00000000h
-
A072h
0000h
-
-
00h
00h
Access
RO
RO
R/W
RO, R/WC
RO
-
RO
RO
-
RO
RO
-
R/W, RO
-
R/WO
R/WO
-
RO
-
-
-
R/W, RO
-
R/W, RO
R/W
-
-
R/W
R/W
46
Datasheet
298338-001