82830MP Datasheet, PDF (76/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel® 830MP Chipset
R
4.5.1.29
AGPSTAT - AGP Status Register - Device #0
Address Offset:
Default Value:
Access:
Size:
A4-A7h
1F000217h
Read Only
32 bits
This register reports AGP device capability/status.
Bit
31:24
23:10
9
8:6
5
4
3
2:0
Description
Request Queue. This field is hardwired to 1Fh to indicate a maximum of 32 outstanding AGP
command requests can be handled by the GMCH-M. Default =1Fh to allow a maximum of 32
outstanding AGP command requests.
Default Value=00011111.
Reserved
SBA. This bit indicates that the GMCH-M supports side band addressing.
It is hardwired to 1.
Reserved
4G. This bit indicates that the GMCH-M does not support addresses greater than 4 GB.
It is hardwired to 0.
Fast Writes
The GMCH-M supports Fast Writes from the CPU to the AGP master.
Fast Writes are disabled.
Default Value=1.
Reserved
RATE. After reset the GMCH-M reports its data transfer rate capability.
Bit 0 identifies if AGP device supports 1x data transfer mode
Bit 1 identifies if AGP device supports 2x data transfer mode
Bit 2 identifies if AGP device supports 4x data transfer mode.
1x, 2x, and 4x data transfer modes are supported by the GMCH-M.
Note: The selected data transfer mode applies to both AD bus and SBA bus.
Default Value=111.
76
Datasheet
298338-001