82830MP Datasheet, PDF (36/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel® 830MP Chipset
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4.1
Register Description
This section details register access and provides PCI register address maps.
Conceptual Overview of the Platform Configuration
Structure
The Intel 830MP chipset GMCH-M and the ICH3-M are physically connected with the Hub interface.
From a configuration standpoint the Hub interface connecting the GMCH-M and the ICH3-M is
logically PCI bus #0. All devices internal to the GMCH-M and ICH3-M appear to be on PCI bus #0. The
system’s primary PCI expansion bus is physically attached to the ICH3-M and, from a configuration
standpoint appears as a hierarchical PCI bus behind a PCI-to-PCI bridge. The primary PCI expansion
bus connected to the ICH3-M has a programmable PCI Bus number. Note that even though the primary
PCI bus is referred to as PCI0 in this document it is not PCI bus #0 from a configuration standpoint.
The GMCH-M contains two PCI devices within a single physical component. The configuration
registers for Device 0 and 1 are mapped as devices residing on PCI bus #0.
• Device 0: Host-Hub Interface Bridge/SDRAM Controller. Logically, this appears as a PCI
device residing on PCI bus #0. Physically, Device 0 contains the standard PCI registers, AGP
capabilities registers, SDRAM registers, the Graphics Aperture controller, and other GMCH-M
specific registers.
• Device 1: Host-AGP Bridge. Logically, this appears as a “virtual” PCI-to-PCI bridge residing on
PCI bus #0. Physically, Device 1 contains the standard PCI-to-PCI bridge registers and the standard
AGP/PCI1 configuration registers (including the AGP I/O and memory address mapping).
Logically the ICH3-M appears as two PCI devices within a single physical component also residing on
PCI bus #0. One of the ICH3-M devices residing on PCI Bus #0 is a PCI-to-PCI bridge. Logically, the
primary side of the bridge resides on PCI bus #0 while the secondary side is the standard PCI expansion
bus (PCI0). Also within the ICH3-M is another PCI Device, the LAN Controller, which resides on the
standard PCI expansion bus (PCI0) down from the PCI-to-PCI bridge.
Note that a physical PCI bus #0 does not exist and that Hub Interface and the internal devices in the
GMCH-M and ICH3-M logically constitute PCI Bus #0 to configuration software. This is shown in
Figure 2.
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Datasheet
298338-001