82830MP Datasheet, PDF (103/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel^® 830MP Chipset
R
5.1.2.5
5.1.2.6
5.1.2.7
5.1.3
5.1.3.1
configuration bits). Since the monochrome adapter may be mapped to anyone of these devices, the
GMCH-M must decode cycles in the MDA range and forward them either to, AGP/PCI1 or to the hub
interface. This capability is controlled by a VGA steering bits and the legacy configuration bit (MDAP
bit). In addition to the memory range B0000h to B7FFFh, the GMCH-M decodes IO cycles at 3B4h,
3B5h, 3B8h, 3B9h, 3Bah, and 3BFh and forwards them to the AGP/PCI1 and/or the hub interface.
Expansion Area (C0000h-DFFFFh)
This 128-KB ISA Expansion region is divided into eight 16- KB segments. Each segment can be
assigned one of four Read/Write states: read-only, write-only, read/write, or disabled. Typically, these
blocks are mapped through GMCH-M and are subtractively decoded to ISA space. Memory that is
disabled is not remapped.
Extended System BIOS Area (E0000h-EFFFFh)
This 64-KB area is divided into four 16-KB segments. Each segment can be assigned independent read
and write attributes so it can be mapped either to main SDRAM or to hub interface. Typically, this area
is used for RAM or ROM. Memory segments that are disabled are not remapped elsewhere.
System BIOS Area (F0000h-FFFFFh)
This area is a single 64-KB segment. This segment can be assigned read and write attributes. It is by
default (after reset) Read/Write disabled and cycles are forwarded to hub interface. By manipulating the
Read/Write attributes, the GMCH-M can “shadow” BIOS into the main SDRAM. When disabled, this
segment is not remapped.
Extended Memory Area
This memory area covers 100000h (1 MB) to FFFFFFFFh (4 GB-1) address range and it is divided into
the following regions:
Main System SDRAM Memory from 1 MB to the Top of Memory; maximum of 1.0 GB.
AGP or PCI Memory space from the Top of Memory to 4 GB with two specific ranges:
APIC Configuration Space from FEC0_0000h (4 GB-20 MB) to FECF_FFFFh and FEE0_0000h
to FEEF_FFFFh
High BIOS area from 4 GB to 4 GB - 2 MB
Main System SDRAM Address Range (0010_0000h to Top of Main
Memory)
The address range from 1 MB to the top of main memory is mapped to main SDRAM address range
controlled by the GMCH-M. The Top of Memory (TOM) is limited to 1.0 GB. All accesses to addresses
within this range will be forwarded by the GMCH-M to the SDRAM unless a hole in this range is
created using the fixed hole as controlled by the FDHC register. Accesses within this hole are forwarded
to hub interface.
The GMCH-M provides a maximum SDRAM address decode space of 4 GB. The GMCH-M does not
re-map APIC memory space. The GMCH-M does not limit SDRAM address space in hardware. It is the
298338-001
Datasheet
103