82830MP Datasheet, PDF (108/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel® 830MP Chipset
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1. For Memory cycles, REQa[4:3]# = ASZ#. The GMCH-M only supports ASZ# = 00 (32 bit
address).
2. REQb[4:3]# = DSZ#. For the Pentium Pro processor, DSZ# = 00 (64 bit data bus size).
3. LEN# = data transfer length as follows:
LEN# Data length
00
<= 8 bytes (BE[7:0]# specify granularity)
01
Length = 16 bytes BE[7:0]# all active
10
4. Reserved.
Length = 32 bytes BE[7:0]# all active
Table 26. Host Bus Responses Supported by GMCH-M
RS2# RS1# RS0# Description
GMCH-M Support
0
0
0
Idle
0
0
1
Retry Response
This response is generated if an access is to a resource
that cannot be accessed by the processor at this time and
the logic must avoid deadlock. Hub Interface directed
reads and writes, SDRAM locked reads, and AGP/PCI,
can be retried. Unless there is an attempt to establish
LOCK, the GMCH-M will never Retry a cycle that targets
system memory.
0
1
0
Deferred Response
This response can be returned for all transactions that can
be executed ‘out of order.’ Hub Interface directed reads
(memory, I/O and Interrupt Acknowledge) and writes (I/O
only), AGP/PCI directed reads (memory and I/O) and
writes (I/O only), and writes (I/O only) can be deferred.
Unless there is an attempt to establish LOCK, the GMCH-
M will never Defer a cycle that targets system memory.
0
1
1
Reserved
Reserved
1
0
0
Hard Failure
Not supported
1
0
1
No Data Response
This is for transactions where the data has already been
transferred or for transactions where no data is
transferred. Writes and zero length reads receive this
response.
1
1
0
Implicit Writeback
This response is given for those transactions where the
initial transactions snoop hits on a modified cache line.
1
1
1
Normal Data Response This response is for transactions where data accompanies
the response phase. Reads receive this response.
5.2.3
Host Addresses Above 4 GB
CPU memory writes to address space above 4 GB will be terminated and discarded immediately. CPU
memory reads to address space above 4 GB will also be immediately terminated and will return the
value of the pulled-up GTL host bus.
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Datasheet
298338-001