82830MP Datasheet, PDF (58/159 Pages) Intel Corporation – Intel 830MP Chipset: 82830MP Graphics and Memory Controller Hub (GMCH-M)

Intel® 830MP Chipset
R
4.5.1.16
GCC1-–GMCH Control Register #1 - Device #0
Address Offset:
Default Value:
Access:
Size:
52-53h
0000h
Read/Write
16 bits
Bit
Descriptions
15:7 Reserved
6:4 Graphics Mode Select (GMS).
Default Value = 000
3
Device #2 Disable
When set to “1” this bit disables Device #2 and all associated spaces.
Default Value = 0
2
Device #2 Function 1 Enable
When set to “1”, enables the second function within Device #2.
Default Value = 0
1
IGD VGA Disable (IVD)
Default Value = 0
0
Device 2: Graphics Memory Size
Default Value = 0
4.5.1.17
FDHC - Fixed DRAM Hole Control Register - Device #0
Address Offset:
Default Value:
Access:
Size:
58h
00h
Read/Write
8 bits
This 8-bit register controls a single fixed SDRAM hole: 15-16 MB.
Bit
Description
7
Hole Enable (HEN). This field enables a memory hole in SDRAM space. Host cycles matching an
enabled hole are passed on to ICH3-M through Hub Interface. Hub Interface cycles matching an
enabled hole will be ignored by the GMCH-M. Note that a selected hole is not re-mapped.
Bit 7
Hole Enabled
0
None
1
15M-16M (1M bytes)
Default Value=0.
6:0
Reserved.
58
Datasheet
298338-001