82091AA Datasheet, PDF (81/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
6 1 3 5 DFIFO Data FIFO (ECP Mode)
I O Address
Default Value
Attribute
Size
Base ^a400h and (ECR 7 5 ^e011)
UUUU UUUU (undefined)
Read Write
8 bits
This I O address location transfers data between the host and peripheral device when the parallel port is in
ECP mode (ECR Bits 7 5 ^e011) Transfers use the parallel port FIFO Data is transferred on PD 7 0 via
hardware handshakes on the parallel port interface using ECP parallel port interface handshake protocol
NOTE
UeUndefined
290486 – 34
Figure 34 ECP Data FIFO (ECP Mode)
Bit
Description
7 0 ECP MODE DATA Data bytes written or DMAed from the system to this FIFO in the forward
direction (PCON bit 5^e0) are transmitted to the peripheral by an ECP mode protocol hardware
handshake In the reverse direction (PCON bit 5^e1) data bytes from the peripheral are transferred
to the FIFO using the ECP mode protocol hardware handshake Reads or DMAs from the FIFO
return bytes of ECP data to the system Bits 7 0 correspond to SD 7 0 and PD 7 0
81