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82091AA Datasheet, PDF (51/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)
82091AA
Bit
Description
7 3 RESERVED
2 IDE DUAL SELECT (IDUAL) When IDUALe0 the IDE address selection is determined by the
IADS bit When IDUALe1 both the primary and secondary IDE addresses are selected and the
setting of the IADS bit does not affect IDE address selection
1 IDE ADDRESS SELECT (IADS) When IADSe0 the primary IDE address is selected (1F0h – 1F7h
3F6h 3F7h ) When IADSe1 the secondary IDE address is selected (1F0h – 1F7h 376h 377h) For
all hardware configuration modes (SWMB SWAI HWB and HWE) the default is determined by
signal pin strapping options
0 IDE INTERFACE ENABLE (IEN) When IENe0 the IDE interface is disabled (i e the IDE chip
selects (IDECS 1 0 ) DEN and HEN are negated (remain inactive) for accesses to the IDE
primary and secondary addresses) When IENe1 the IDE interface is enabled For all hardware
configuration modes (SWMB SWAI HWB and HWE) the default is determined by signal pin
strapping options
4 2 Hardware Configuration
Hardware configuration provides a mechanism for
configuring certain 82091AA operations at powerup
Four hardware configuration modes provide different
levels of configuration depending on the type of ap-
plication and the degree of hardware software con-
figuration desired The hardware configuration
modes are
 Software Motherboard (SWMB)
 Software Add-In (SWAI)
 Hardware Extended (HWE)
 Hardware Basic (HWB)
These modes support a variety of system implemen-
tations For example with Hardware Basic (HWB)
and Hardware Extended (HWE) modes an exten-
sive set of 82091AA configuration options are avail-
able for setting up the 82091AA at powerup This
permits the 82091AA to be used in systems without
82091AA software drivers For many of these sys-
tems access to the 82091AA configuration registers
may not be necessary As such access to these
registers can be disabled via hardware configura-
tion This option could be used to prevent software
from inadvertently re-configuring the 82091AA
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