82091AA Datasheet, PDF (29/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
4 0 AIP CONFIGURATION
82091AA configuration consists of setting up overall
device operations along with certain functions
pertaining to the individual 82091AA modules
(parallel port serial ports floppy disk controller and
IDE interface) Overall device operations include
selecting the clock frequency power supply voltage
and address assignment for the configuration
registers Overall device operations also enable
disable access to the configuration registers and
provide interrupt signal level control For the
individual modules 82091AA configuration includes
module address assignment interrupt control
module enable disable powerdown control test
mode control module reset and certain functions
specific to each module The remainder of the
functions unique to each module are handled via the
individual module registers
Two methods are provided for configuring the
82091AA hardware configuration via strapping op-
tions at powerup (or whenever RSTDRV is asserted)
and software configuration by programming the con-
figuration registers (For information on hardware
configuration see Section 4 2 Hardware Configura-
tion For information on software configuration see
Section 4 1 Configuration Registers )
NOTE
1 There are four hardware configuration
modes SWMB (Software Motherboard)
SWAI (Software Add-In) HWB (Hardware
Basic) and HWE (Hardware Extended)
Some of these modes can be used without
the need for programming the 82091AA
configuration registers Other modes use
both hardware configuration strapping op-
tions and programming the configuration
registers to set up the 82091AA
2 The 82091AA’s operating power supply
voltage level 82091AA clock frequency
and address assignment for the 82091AA
configuration registers can only be config-
ured by hardware configuration
4 1 Configuration Registers
82091AA Configuration Space contains 13 configu-
ration registers Four of the registers (Product and
Revision Identification Registers and the 82091AA
Configuration 1 and 2 Registers) provide control and
status information for the entire chip In addition two
registers each for the floppy disk controller parallel
port serial port A and serial port B and one register
for the IDE interface provide certain module status
and control information The 82091AA configuration
registers are indirectly addressed by first writing to
the 82091AA Configuration Index Register as de-
scribed in Section 4 1 1 Thus the 13 configuration
registers occupy two address locations in the host’s
I O address space one for indirectly selecting the
specific configuration register and the other for
transfering register data All 82091AA configuration
registers are 8-bits wide and are accessed as byte
quantities
Some of the 82091AA Configuration registers de-
scribed in this section contain reserved bits These
bits are labeled ‘‘R’’ Software must deal correctly
with fields that are reserved On reads software
must use appropriate masks to extract the defined
bits and not rely on reserved bits being any particu-
lar value On writes software must ensure that the
values of reserved bit positions are preserved That
is the value of reserved bit positions must first be
read merged with the new values for other bit posi-
tions and then written back
In addition to reserved bits within a register the
82091AA configuration space contains address lo-
cations that are labeled ‘‘Reserved’’ (Table 5) While
the 82091AA responds to accesses to these I O ad-
dresses by completing the host cycle writing to a
reserved I O address can result in unintended de-
vice operations Values read from a reserved I O
address should not be used to permit future expan-
sion and upgrades
During a hard reset (RSTDRV asserted) the
82091AA sets its configuration registers to pre-de-
termined default states The default values are indi-
cated in the individual register descriptions The fol-
lowing nomenclature is used for register access at-
tributes
RO Read Only If a register is read only writes
have no effect
R W Read Write A register with this attribute can
be read and written Note that individual bits in
some read write registers may be read only
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