82091AA Datasheet, PDF (34/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
Bit
Description
7 NOT USED Always write to 0
6 VOLTAGE SELECT (VSEL) This bit indicates whether 3 3V or 5V has been selected for the
operating power supply voltage during hardware configuration A 1 indicates that 3 3V is selected
and a 0 indicates that 5V is selected This bit is read only and writes have no effect
NOTE
3 3V operation is available only in the 82091AA
5 4 CONFIGURATION MODE SELECT (CFGMOD) These bits indicate the configuration mode for the
82091AA After a hard reset these bits reflect the mode selected by hardware configuration If
configuration register access is not locked out during hardware configuration software can change
the configuration mode by writing to this field For configuration mode details (see Section 4 2
Hardware Configuration)
Bits 5 4
00
01
10
11
Configuration Mode
Software Motherboard (SWMB)
Software Add-in (SWAI)
Extended Hardware (HWE)
Basic Hardware (HWB)
3 CONFIGURATION ADDRESS SELECT (CFGADS) This read only bit indicates the address
assignment for the 82091AA configuration registers as selected by hardware configuration
Hardware configuration selects between primary addresses (22h 23h and 26Eh 26Fh) and
secondary addresses (24h 25h and 398h 399h) for accessing the 82091AA configuration registers
When CFGADS^e0 the primary addresses are selected and when CFGADS^e1 the secondary
addresses are selected
2 RESERVED
1 RESERVED
0 CLOCK OFF (CLKOFF) The CLKOFF bit is used to implement clock circuitry power management
When CLKOFF^e0 the main clock circuitry is powered on When CLKOFF^e1 the main clock
circuitry is powered off This capability is independent of the 82091AA’s powerdown state Note that
auto powerdown mode and powerdown have no effect over the power state of the clock circuitry
4 1 5 AIPCFG2 AIP CONFIGURATION 2 REGISTER
Index Address
Default Value
Attribute
Size
03h
0000 0RRR
Read Write
8 bits
This register selects the active signal level for IRQ 7 3 The interrupt signals can be individually programmed
for either active high or active low drive characteristics The active high mode is ISA (non-share) compatible
and has tri-state drive characteristic The active low mode is EISA (sharable) compatible and has an open
collector drive characteristic
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