82091AA Datasheet, PDF (18/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
2 3 Serial Port Interface (Continued)
Signal
Name
Type
Description
RTSA
RTSB
I O REQUEST TO SEND RTSA RTSB are outputs during normal system
operations When asserted this signal informs the modem or data set that the
serial port module is ready to exchange data The RTS signal can be asserted
via the RTS bit in the Modem Control Register A hard reset negates this signal
Hardware Configuration
These signals are only inputs during hardware configuration time (RSTDRV
asserted and for a short time after RSTDRV is negated) (See Section 4 0 AIP
Configuration )
SINA SINB
I
SERIAL INPUT Serial data input from the communications link (Peripheral
device modem or data set )
SOUTA
SOUTB
I O SERIAL OUTPUT SOUTA SOUTB are serial data outputs to the communications
link during normal system operations (Peripheral device modem or data set ) The
SOUT signal is set to a marking state (logic 1) after a hard reset
Test Mode
In test mode (selected via the SACFG2 or SBCFG2 Registers) the baudout from
the baud rate generator is output on SOUTx
Hardware Configuration
These signals are only inputs during hardware configuration time (RSTDRV
asserted and for a short time after RSTDRV is negated) (See Section 4 0 AIP
Configuration )
2 4 IDE Interface
Signal
Name
Type
IO16
I
IDECS 1 0
IO
Description
16-BIT I O This signal is driven by I O devices on the ISA Bus to indicate
support for 16-bit I O bus cycles The IDE interface asserts this signal to the
82091AA to indicate support for 16-bit transfers For IDE transfers the 82091AA
asserts HEN when IO16 is asserted
IDE CHIP SELECT IDECS 1 0 are outputs during normal system operation
and are chip selects for the IDE interface IDECS 1 0 select the Command
Block Registers of the IDE device and are decoded from SA 9 3 and AEN
Hardware Configuration
These signals are only inputs during hardware configuration time (RSTDRV
asserted) (See Section 4 0 AIP Configuration )
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