82091AA Datasheet, PDF (115/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
8 0 FLOPPY DISK CONTROLLER
The 82091AA’s Floppy Disk Controller (FDC) is
functionally compatible with 82078 82077SL
82077AA 8272A floppy disk controllers During
82091AA configuration the FDC can be configured
for either two drive support or four drive support via
the FCFG1 Register This section provides a com-
plete description of the FDC when it is configured for
two drive support Additional information on four
drive support is provided in Appendix A FDC Four
Drive Support
NOTE
For FDC compatibility and programming
guidelines refer to the 82078 Floppy Disk
Controller Data sheet
8 1 Floppy Disk Controller Registers
The FDC contains seven status control and data
registers Table 23 shows the I O address assign-
ments for the FDC registers and the individual regis-
ter descriptions follow in the order that they appear
in the table The registers provide control status
information and data paths for transfering data be-
tween the floppy disk controller interface and the
8-bit host interface In some cases two different reg-
isters occupy the same I O address In these cases
one register is read only and the other is write only
(i e a read to the I O address accesses one regis-
ter and a write accesses the other register)
All registers are accessed as byte quantities The
base address is determined by hardware configura-
tion at powerup (or a hard reset) or via software con-
figuration by programming the 82091AA configura-
tion registers as described in Section 4 0 AIP Con-
figuration
During a hard reset (RSTDRV asserted) the
82091AA registers are set to pre-determined de-
fault states The default values are indicated in the
individual register descriptions Reserved bits in the
FDC registers must be programmed to 0 when writ-
ing the register and these bits are 0 when read The
following bit notation is used for default settings
X Default bit position value is determined by
conditions on an 82091AA signal pin
The following nomenclature is used for register ac-
cess attributes
RO Read Only Note that for registers with read
only attributes writes to the I O address have
no affect on floppy disk operations
WO Write Only Note that for all FDC registers
with write only attributes reads of the I O ad-
dress access a different register
R W Read Write A register with this attribute can
be read and written Note that individual bits in
some read write registers may be read only
Table 23 lists the register accesses that bring the
FDC out of a powerdown state All other registers
accesses are possible without waking the part from
a powerdown state and reads from these registers
reflects the true status as shown in the register de-
scription For writes that do not affect the power-
down state the FDC retains the data and will subse-
quently reflect it when the FDC awakens Note that
for accesses that do not affect powerdown the ac-
cess may cause a temporary increase in FDC power
consumption The FDC reverts back to low power
mode when the access has been completed None
of the extended registers effect the behavior of the
powerdown mode
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