82091AA Datasheet, PDF (17/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
2 3 Serial Port Interface
Serial Port A signal names end in the letter A and Serial Port B signal names end in the letter B Serial Port A
and B signals have the same functionality
Signal
Name
CTSA
CTSB
DCDA
DCDB
DSRA
DSRB
DTRA
DTRB
RIA RIB
Type
Description
I
CLEAR TO SEND When asserted this signal indicates that the modem or data
set is ready to exchange data The CTS signal is a modem status input whose
condition the CPU can determine by reading the CTS bit in Modem Status
Register (MSR) for the appropriate serial port The CTS bit is the compliment of
the CTS signal The DCTS bit in the MSR indicates whether the CTS input
has changed state since the previous reading of the MSR CTS has no effect on
the transmitter
I
DATA CARRIER DETECT When asserted this signal indicates that the data
carrier has been detected by the modem or data set The DCD signal is a
modem status whose condition the CPU can determine by reading the DCD bit in
the MSR for the appropriate serial port The DCD bit is the compliment of the
DCD signal The DDCD bit in the MSR indicates whether the DCD input has
changed state since the previous reading of the MSR DCD has no effect on the
transmitter
I
DATA SET READY When asserted this signal indicates that the modem or data
set is ready to establish the communications link with the serial port module The
DSR signal is a modem status whose condition the CPU can determine by
reading the DSR bit in the MSR for the appropriate serial channel The DSR bit is
the compliment of the DSR signal The DSR bit in the MSR indicates whether
the DSR input has changed state since the previous reading of the MSR DSR
has no effect on the transmitter
I O DATA TERMINAL READY DTRA DTRB are outputs during normal system
operations When asserted this signal indicates to the modem or data set that
the serial port module is ready to establish a communications link The DTR
signal can be asserted via the Modem Control Register (MCR) A hard reset
negates this signal
Hardware Configuration
These signals are only inputs during hardware configuration time (RSTDRV
asserted and for a short time after RSTDRV is negated) (See Section 4 0 AIP
Configuration )
I
RING INDICATOR When asserted this signal indicates that a telephone ringing
signal has been received by the modem or data set The RI signal is a modem
status input whose condition the CPU can determine by reading the RI bit in the
MSR for the appropriate serial channel The RI bit is the compliment of the RI
signal The TERI bit in the MSR indicates whether the RI input has changed
from low to high since the previous reading of the MSR
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