82091AA Datasheet, PDF (27/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
2 8 Power And Ground
Signal
Name
Type
Description
V_SS
I
GROUND The ground reference for the 82091AA
V_CC
I
POWER The 5V 3 3V⁽¹⁾ modes are selected via strapping options at power-up (see
Section 4 2 hardware Configuration) When strapping options (V_SEL) are set to 5V the
V_CC pins must be connected to 5V When strapping options are set to 3 3V the V_CC
pins must be connected to 3 3V
V_CCF
I
POWER The 5V 3 3V⁽¹⁾ power supply for the 82091AA In 5V or 3 3V power supply
modes (non-mixed mode) the voltage applied to V_CCF is the same voltage as applied
to V_CC
For mixed mode operations 5V is applied to V_CCF This voltage provides 5V reference
for the parallel port and floppy disk controller interfaces Note that in mixed mode 3 3V
is applied to V_CC
NOTE
1 3 3V operation is available only in the 82091AA
3 0 I O ADDRESS ASSIGNMENTS
The 82091AA assigns CPU I O address locations to
its game port chip select IDE interface serial ports
parallel port floppy disk controller and the 82091AA
configuration registers as indicated in Table 3 Ex-
cept for the game port chip select (address 201h)
address assignments are configurable For example
the serial port can be assigned to one of eight ad-
dress blocks The parallel port can be assigned to
one of three address blocks and the IDE interface
and floppy disk controller can be assigned to one of
two address blocks These address assign-
ments are made during 82091AA configuration (ei-
ther hardware configuration at powerup or a hard
reset or software configuration by programming the
82091AA configuration registers) In addition the
82091AA configuration registers can be located at
one of two address blocks during hardware configu-
ration
All of the 82091AA address locations are located in
the host I O address space The address block as-
signments are shown in Table 3 The first hex ad-
dress in the Address Block column represents the
base address for that particular block
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