82091AA Datasheet, PDF(45/204 Page) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

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82091AA Datasheet, PDF (45/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

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82091AA

Figure 15 Test Mode Output (SOUTA and SOUTB)

290486 â 15

Bit

Description

3 SERIAL PORT A AUTO POWERDOWN ENABLE (SAAPDN) This bit enables disables auto

powerdown When SAAPDNe1 Serial Port A can enter auto powerdown if the required conditions

are met The required conditions are that the transmit and receive FIFOs are empty and the timeout

counter has expired When SAAPDNe0 auto powerdown is disabled

2 SERIAL PORT A RESET (SARESET) When SARESETe1 the Serial Port A module is reset (i e all

programming and current state information is lost) This is the same state the module would be in

after a hard reset (RSTDRV asserted) When resetting the serial port via this configuration bit the

software must toggle this bit and ensure the reset active time (SARESETe1) of 1 13 ms minimum is

met

1 SERIAL PORT A IDLE STATUS (SAIDLE) When Serial Port A is in an idle state the 82091AA sets

this bit to 1 Serial Port A is in the idle state when the transmit and receive FIFOs are empty and the

timeout counter has expired Note that these are the same conditions that apply to entering auto

powerdown When serial port A is not in an idle state the 82091AA sets this bit to 0 Direct

powerdown does not affect this bit and in auto powerdown SAIDLE is only set to a 1 if the receive

and transmit FIFOs are empty This bit is read only

During a hard reset (RSTDRV asserted) The 82091AA sets SAIDLE to 0 However because the

serial port is typically initialized by software before the idle conditions are met the default state is

shown as undefined

0 SERIAL PORT A DIRECT POWERDOWN (SADPDN) When SADPDNe1 Serial Port A is placed in

direct powerdown mode Setting this bit to 0 brings Serial Port A out of direct powerdown mode

Setting bit 2 (SARESET) of this register to 1 will also bring Serial Port A out of the direct powerdown

mode

NOTE

Direct powerdown resets the receiver and transmitter portions of the serial port including the

receive and transmit FIFOs To ensure that the resetting of the FIFOs does not cause data

loss the SAIDLE bit should be 1 before placing the serial port into direct powerdown

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