82091AA Datasheet, PDF (175/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
NOTES (Continued)
7 Based on the internal clock period (t1e) For various data rates the read and write data width minimum values are
Disk Drive
Data Rate
1 Mbps
500 Kbps
300 Kbps
250 Kbps
24 MHz
150 ns
360 ns
615 ns
740 ns
8 This timing is a function of the selected data rate as follows
Disk Drive
Data Rate
1 Mbps
500 Kbps
300 Kbps
250 Kbps
Timing
1 0 ms Min
2 0 ms Min
3 3 ms Min
4 0 ms Min
9 This value can range from 0 5 ms to 8 0 ms and is dependent upon data rate and the Specify Command value
10 The minimum MFM values for WE to HDSEL change for the various data rates are
Disk Drive
Data Rate
Min MFM Value
1 Mbps
0 5 ms a 8 c GPL
500 Kbps
1 0 ms a 16 c GPL
300 Kbps
1 6 ms a 26 66 c GPL
250 Kbps
2 0 ms a 32 c GPL
GPL is the size of gap 3 defined in the sixth byte of a Write Command
11 Based on internal clock period
12 Jitter tolerance is defined as
(Maximum bit shift from nominal position d period of nominal data rate) c 100 percent is a measure of the allowable
bit jitter that may be present and still be correctly detected The data separator jitter tolerance is measured under
dynamic conditions that jitters the bit stream according to a reverse precompensation algorithm
13 The minimum reset active period for a software reset is dependent on the data rate after the FDC module has been
properly reset using the t10a spec The minimum software reset period then becomes
Disk Drive
Data Rate
1 Mbps
500 Kbps
300 Kbps
250 Kbps
Minimum Software Reset
Active Period
24 MHz
125 ns
250 ns
420 ns
500 ns
175