82091AA Datasheet, PDF (11/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
In addition to a hardware handshake on the parallel
port interface the ECP protocol specification also
defines DMA and FIFO capability To minimize pro-
cessor overhead data transfer to from a peripheral
device the 82091AA parallel port in ECP mode
provides a 16-byte FIFO with DMA capability
IDE Interface
The 82091AA supports the IDE (Integrated Drive
Electronics) interface by providing chip selects and
lower data byte control Two chip selects are used to
access registers on the IDE device Separate lower
and upper byte data control signals are provided
With these control signals minimal external logic is
needed to implement 16-bit IDE I O and DMA inter-
faces
Game Port
The 82091AA provides a game port chip select sig-
nal for use when the 82091AA is in an add-in card
application This function is assigned to I O address
location 201h Note that when the 82091AA is locat-
ed on the motherboard this feature is not available
Power Management
82091AA power management provides a mecha-
nism for saving power when the device or a portion
of the device is not being used By programming the
appropriate 82091AA registers software can invoke
power management to the entire 82091AA or select-
ed modules within the 82091AA (e g floppy disk
controller serial port or parallel port) There are two
methods for applying power management direct
powerdown or auto powerdown Direct powerdown
turns off the clock to a particular module immediate-
ly placing that module into a powerdown state This
method removes the clock regardless of the activity
or status of the module When auto powerdown is
invoked the module enters a powerdown state
(clock is turned off) after certain conditions are met
and the module is in an idle state
1 1 3 3V 5V Operating Modes
The 82091AA can operate at a power supply of
3 3V 5V or a mix of 3 3V and 5V The mixed power
supply mode provides 5V interfaces for the floppy
disk controller and parallel port while all other
82091AA interfaces and internal logic (including the
floppy disk controller and parallel port internal cir-
cuitry) operate at 3 3V The mixed mode permits 5V
floppy disk drives and parallel port peripherals to be
used in a 3 3V system without external buffering
NOTE
3 3V operation is available only in the
82091AA
2 0 SIGNAL DESCRIPTION
This section describes the 82091AA signals The in-
terface signals are shown in Figure 5 and described
in the following tables Signal descriptions are orga-
nized by functional group
Note that the ‘‘ ’’ symbol at the end of a signal
name indicates the active or asserted state occurs
when the signal is at a low voltage level When ‘‘ ’’
is not present after the signal name the signal is
asserted when at the high voltage level
The terms assertion and negation are used exten-
sively This is done to avoid confusion when working
with a mixture of ‘‘active-low’’ and ‘‘active-high’’ sig-
nals The term assert or assertion indicates that a
signal is active independent of whether that level is
represented by a high or low voltage The term ne-
gate or negation indicates that a signal is inactive
The following notations are used to describe pin
types
I Input Pin
O Output Pin
I O Bi-Directional Pin
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