82091AA Datasheet, PDF (198/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
A 2 DOR Digital Output Register
I O Address
Default Value
Attribute
Size
Base ^a2h
00h
Read Write
8 bits
The Digital Output Register enables disables the floppy disk drive motors selects the disk drives enables dis-
ables DMA and provides a FDC module reset The DOR reset bit and the Motor Enable bits have to be
inactive when the 82091AA’s FDC is in powerdown The DMAGATE and Drive Select bits are unchanged
During powerdown writing to the DOR does not wake up the 82091AA’s FDC except for activating any of the
motor enable bits Setting the motor enable bits to 1 will wake up the module The four internal drive select and
four internal motor enable signals are encoded to a total of four output pins as described in Table 47 Figure 99
shows an example of how these four output pins can be decoded to provide four drive select and four motor
enable signals Note that only drive 0 or drive 1 can be used as the boot drive when four disk drives are
enabled
Figure 98 Digital Output Register
290486 – A1
A-2