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82091AA Datasheet, PDF (47/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)
82091AA
Bit
Description
7 MIDI CLOCK FOR SERIAL PORT B ENABLE (SBMIDI) When SBMIDIe1 the clock into Serial
Port B is changed from 1 8462 MHz to 2 MHz The 2 MHz clock is needed to generate the MIDI baud
rate When SBMIDIe0 the clock frequency is 1 8462 MHz The default value is 0
6 4 RESERVED
4 SERIAL PORT B IRQ SELECT (SBIRQSEL) When SBIRQSELe0 IRQ3 is selected for the Serial
Port B interrupt When SBIRQSELe1 IRQ4 is selected for the Serial Port B interrupt The default
value is 0 This bit can be configured by strapping options at powerup for HWB and HWE modes
only For SWMB and SWAI configuration modes the default is 0 (IRQ3) Note that while the default
address and IRQ assignments for SWMB and SWAI modes are the same for both serial ports the
serial ports are disabled and programming of this register is required for operation
3 1 SERIAL PORT B ADDRESS SELECT (SBADS) This field selects the ISA address range for Serial
Port B as follows
Bits 3 1
000
001
010
011
100
101
110
111
ISA Address Range
3F8 – 3FFh
2F8 – 2FFh
220 – 227h
228 – 22Fh
238 – 23Fh
2E8 – 2EFh
338 – 33Fh
3E8 – 3EFh
This field can be configured by strapping options at powerup for HWB and HWE modes only For
SWMB and SWAI configuration modes the default is 000 (3F8 – 3FFh) Note that while the default
address and IRQ assignments for SWMB and SWAI modes are the same for both serial ports the
serial ports are disabled and programming of this register is required for operation
0 SERIAL PORT B ENABLE (SBEN) When SBENe1 Serial Port B is enabled When SAENe0
Serial Port B is disabled This bit can be configured by strapping options at powerup for HWB and
HWE modes only For SWMB and SWAI configuration modes the default is 0 (disabled)
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