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82091AA Datasheet, PDF (141/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)
82091AA
Symbol
DRT0 DRT1
DT0 DT1
EC
EFIFO
EIS
EOT
EREG EN
FDI TRI
Description
DATA RATE TABLE SELECT These two bits select between the different data rate tables
The default is the conventional table These also provide mapping of the data rates selected
in the DSR and CCR The table below shows this
DRT1
0
0
1
1
DRT0
0
1
0
1
DRATE1
1
0
0
1
RSVD
RSVD
1
0
0
1
Bits in DSR
DRATE0 Data Rate
1
1 Mbps
0
500 Kbps
1
300 Kbps
0
250 Kbps
RSVD RSVD
RSVD RSVD
1
1 Mbps
0
500 Kbps
1
Illegal
0
250 Kbps
Operation
Default
RSVD
RSVD
Perpendicular mode FDDs
DRIVE DENSITY SELECT TYPE These bits select the outputs on DRVDEN0 and
DRVDEN1 (see DRIVE SPECIFICATION Command)
ENABLE COUNT When ECe1 the DTL parameter of the Verify Command becomes SC
(Number of sectors per track)
Enable FIFO When EFIFOe0 the FIFO is enabled EFIFOe1 puts the FDC in the 8272A
compatible mode where the FIFO is disabled
ENABLE IMPLIED SEEK When EISe1 a seek operation is performed before executing
any read or write command that requires the C parameter in the command phase EISe0
disables the implied seek
END OF TRACK The final sector number of the current track
ENHANCED REGISTER ENABLE When EREG ENe1 the TDR register is extended and
SRB is made visible to the user When EREG ENe0 the standard registers are used
FLOPPY DRIVE INTERFACE TRI-STATE When FDI TRIe0 the output pins of the floppy
disk drive interface are tri-stated This is also the default state When FDI TRIe1 the floppy
disk drive interface remains unchanged
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