82091AA Datasheet, PDF (200/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
Description
ME0 and
DS0 enable
ME1 and
DS1 enable
ME2 and
DS2 enable
ME3 and
DS3 enable
ME0 enable
only
ME1 enable
only
ME2 enable
only
ME3 enable
only
No ME or
DS enable
ME3
X
X
X
1
X
X
X
1
0
Table 46 Output Pin Status for Four Disk Drives
FDC DOR Register Bits
Signal Pins
ME2 ME1 ME0 DS1 DS0 MDS1 MDS0 DSEN
X
X
1
0
0
0
0
0
X
1
X
0
1
0
1
0
1
X
X
1
0
1
0
0
X
X
X
1
1
1
1
0
X
X
1 DS 1 0 ⁱ 00
0
0
1
X
1
0 DS 1 0 ⁱ 01
0
1
1
1
0
0 DS 1 0 ⁱ 10
1
0
1
0
0
0 DS 1 0 ⁱ 11
1
1
1
0
0
0
X
X
1
1
1
MEEN
0
0
0
0
0
0
0
0
1
NOTE
To enable a particular drive motor and select the drive the value for DS 1 0 must match the appropriate motor enable bit
selected as indicated in the first four rows of the table For example to enable the drive 0 motor and select the drive ME0 is
set to 1 and DS 1 0 must be set to 00 To enable the drive motor and keep the drive de-selected the value for DS 1 0
must not match the particular motor enable as shown in the first four rows For example to enable the motor for drive 0
while the drive remains de-selected ME0 is set to 1 and DS 1 0 is set to 01 10 or 11
A-4