82091AA Datasheet, PDF(204/204 Page) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

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82091AA Datasheet, PDF (204/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

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82091AA

Bit

Description

7 Request For Master (RQM) When RQMe1 the FDC is ready to send receive data through the

FIFO (FDCFIFO Register) The FDC sets this bit to 0 after a byte transfer and then sets the bit to 1

when it is ready for the next byte During non-DMA execution phase RQM indicates the status of

IRQ6

6 Direction I O (DIO) When RQMe1 DIO indicates the direction of a data transfer When DIOe1

the FDC is requesting a read of the FDCFIFO When DIOe0 the FDC is requesting a write to the

FDCFIFO

5 NON-DMA (NONDMA) Non-DMA mode is selected via the SPECIFY Command In this mode the

FDC sets this bit to a 1 during the execution phase of a command This bit is for polled data transfers

and helps differentiate between the data transfer phase and the reading of result bytes

4 Command Busy (CMDBUSY) CMDBUSY indicates when a command is in progress When the first

byte of the command phase is written the FDC sets this bit to 1 CMDBUSY is set to 0 after the last

byte of the result phase is read If there is no result phase (e g SEEK or RECALIBRATE

Commands) CMDBUSY is set to 0 after the last command byte is written

3 Drive 3 Busy (DRV1BUSY) The FDC module sets this bit to 1 after the last byte of the command

phase of a SEEK or RECALIBRATE Command is issued for drive 3 This bit is set to 0 after the host

reads the first byte in the result phase of the SENSE INTERRUPT Command for this drive

2 Drive 2 Busy (DRV1BUSY) The FDC module sets this bit to 1 after the last byte of the command

phase of a SEEK or RECALIBRATE Command is issued for drive 2 This bit is set to 0 after the host

reads the first byte in the result phase of the SENSE INTERRUPT Command for this drive

1 Drive 1 Busy (DRV1BUSY) The FDC module sets this bit to 1 after the last byte of the command

phase of a SEEK or RECALIBRATE Command is issued for drive 1 This bit is set to 0 after the host

reads the first byte in the result phase of the SENSE INTERRUPT Command for this drive

0 Drive 0 Busy (DRV0BUSY) The FDC module sets this bit to 1 after the last byte of the command

phase of a SEEK or RECALIBRATE Command is issued for drive 0 This bit is set to 0 after the host

reads the first byte in the result phase of the SENSE INTERRUPT Command for this drive

A-8