English
Language : 

82091AA Datasheet, PDF (103/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)
82091AA
Bit
Description
7 6 FIFO MODE ENABLE STATUS (FIFOES) This status field indicates whether the serial port is in
FIFO mode or non-FIFO mode (FIFO non-FIFO mode is selected via the FCR) When FIFOESe11
the serial port is in FIFO mode (FIFOs enabled) When FIFOESe00 the serial port is in non-FIFO
mode (FIFOs disabled) The 82091AA never sets this field to eithere01 or 10
5 4 RESERVED
3 TIMEOUT INTERRUPT PENDING (TOUTIP) FIFO MODE ONLY In the non-FIFO mode this bit is
0 In FIFO mode TOUTIP is set to 1 when no characters have been removed from or input to the
receive FIFO during the last 4 character times and there is at least 1 character in the FIFO during
this time When a timeout interrupt is pending the 82091AA sets this bit along with bit 2 of this
register
2 1 HIGHEST PRIORITY INTERRUPT INDICATOR This field identifies the highest priority interrupt
pending as indicated in Table 22
0 INTERRUPT PENDING STATUS (IPS) This bit can be used in an interrupt environment to indicate
whether an interrupt condition is pending When IPSe0 an interrupt is pending and the IIR contents
may be used as a pointer to the appropriate interrupt service routine When IPSe1 no interrupt is
pending
FIFO
Mode
Only
Bit 3
0
0
0
1
0
0
Interrupt
Identification
Register
Bit 2 Bit 1 Bit 0
0
0
1
1
1
0
1
0
0
1
0
0
0
1
0
0
0
0
Table 22 Interrupt Priority
Interrupt Set and Reset Functions
Priority
Level
Interrupt
Type
Interrupt Source
Interrupt Reset
Control
None
None
Highest
Receiver Line
Status
Overrun Error Parity Reading the Line
Error Framing Error or Status Register
Break Interrupt
Second Received
Receiver Data
Data Available Available
Read Receiver Buffer
Second Character
Timeout
Indication
No Characters Have
Been Removed from or
Input to the RCVR
FIFO during the Last 4
Char Times and there
is at least 1 Char in it
during this time
Reading the Receiver
Buffer Register
Third
Transmitter
Holding
Register
Empty
Transmitter Holding
Register Empty
Reading the IIR
Register (if Source or
Interrupt) or Writing the
Transmitter Holding
Register
Fourth
Modem Status
Clear to Send or Data
Set Ready or Ring
Indicator or Data
Carrier Detect
Reading the Modem
Status Register
103