82091AA Datasheet, PDF (36/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
4 1 6 FCFG1 FDC CONFIGURATION REGISTER
Index Address
Default Value
Attribute
Size
10h
0RRR RR01
Read Write
8 bits
This register selects between a 2 and 4 floppy drive system selects primary secondary ISA address range for
the FDC and enables disables the FDC All bits in this register are read write
290486 – 9
NOTES
Default shown is for SWMB SWAI and HWB hardware configuration modes For HWE the default is determined by
hardware strapping options as described in Section 4 2 Hardware Configuration
Default shown is for SWMB and SWAI configuration modes For HWB and HWE configuration modes the default is
determined by hardware strapping options as described in Section 4 2 Hardware Configuration
Figure 9 FDC Configuration Register
Bit
Description
7 FLOPPY DISK DRIVE QUANTITY (FDDQTY) This bit selects between two and four floppy disk
drive capability When FDDQTY^e0 the 82091AA can control two floppy disk drives directly without
an external decoder When FDDQTY^e1 the 82091AA can control four floppy disk drives with an
external decoder When FDDQTY^e1 the PDEN feature in the powerdown command is disabled
For further details see Appendix A FDC Four Drive Support This bit can be configured by hardware
extended configuration (HWE) at powerup For all other hardware configuration modes (SWMB
SWAI and HWB) the floppy disk drive quantity is not configurable by hardware strapping options
and defaults to 2 drives
6 2 RESERVED
1 FLOPPY DISK CONTROLLER ADDRESS SELECT (FADS) When FADS^e0 the primary FDC
address (3F0 – 3F7) is selected When FADS^e1 the secondary FDC address (370 – 377) is
selected For SWMB and SWAI configuration modes the default is 0 (primary address) For HWB
and HWE hardware configuration modes the default is determined by signal pin strapping options
0 FLOPPY DISK CONTROLLER ENABLE (FEN) This bit enables disables the FDC When FEN^e1
the FDC is enabled When FEN^e0 the FDC module is disabled For SWMB and SWAI configuration
modes the default is 1 (enabled) For HWB and HWE hardware configuration modes the default is
determined by signal pin strapping options Note that when the FDC is disabled IRQ6 and FDDREQ
are tri-stated
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