82091AA Datasheet, PDF (46/204 Pages) Intel Corporation – ADVANCED INTEGRATED PERIPHERAL (AIP)

82091AA
4 1 12 SBCFG1 SERIAL PORT B CONFIGURATION REGISTER
Index Address
Default Value
Attribute
Size
40h
0RR0 0000
Read Write
8 bits
The SBCFG1 register enables disables Serial Port B selects the Serial Port B address range and selects
between IRQ3 and IRQ4 as the Serial Port B interrupt This register also selects the appropriate clock frequen-
cy for use with MIDI
NOTES
1 Through programming of this register and the SBCFG1 Register the 82091AA permits serial ports A
and B to be configured for the same interrupt assignment However software must take care in
responding to interrupts correctly
2 It is possible to enable and assign both serial ports to the same address through software In this
configuration the 82091AA disables serial port B but does not set serial port B into it’s powerdown
condition Although this is a safe configuration for the 82091AA it is not power conservative and is
not recommended
290486 – 16
NOTE
Default shown is for SWMB and SWAI hardware configuration modes For HWB and HWE modes the default is
determined by hardware strapping options as described in Section 4 2 Hardware Configuration
Figure 16 Serial Port B Configuration Register
46