HD6475328CG Datasheet, PDF (85/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

3.7.4 Register Field Access Cycle (Addresses H'FF80 to H'FFFF)
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Internal address bus
Internal Read signal
Internal data bus
(read access)
Internal Write signal
Internal data bus
(write access)
T1 state
Memory cycle
T2 state
T3 state
Address
Read data
Write data
Figure 3-8 Register Field Access Timing
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