HD6475328CG Datasheet, PDF (177/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Pin Functions in Modes 2 and 4: In modes 2 and 4, (expanded modes in which the on-chip
ROM is used), software can select whether to use port 5 for general-purpose input, or for
output of bits A15 – A8 of the address bus.
If a bit in P5DDR is set to “1,” the corresponding pin is used for address output. If the bit is
cleared to “0,” the pin is used for input. A reset clears all P5DDR bits to “0,” so before the
address bus is used, all necessary bits in P5DDR must be set to “1.”
Figure 9-13 shows the pin functions in modes 2 and 4.
When P5DDR
When P5DDR Bit
Bit is Set to “1”
is Cleared to “0”
A15 (output)
P57 (input)
A14 (output)
P56 (input)
A13 (output)
P55 (input)
Port
A12 (output)
P54 (input)
5
A11 (output)
P53 (input)
A10 (output)
P52 (input)
A9 (output)
P51 (input)
A8 (output)
P50 (input)
Figure 9-13 Port 5 Pin Functions in Modes 2 and 4
Pin Functions in Single-Chip Mode: In the single-chip mode (mode 7), each of the port 5
pins can be designated as an input pin or an output pin, as indicated in figure 9-14, by setting
the corresponding bit in P5DDR to “1” for output or clearing it to “0” for input.
P57 (input/output)
P56 (input/output)
P55 (input/output)
Port
P54 (input/output)
5
P53 (input/output)
P52 (input/output)
P51 (input/output)
P50 (input/output)
Figure 9-14 Port 5 Pin Functions in Single-Chip Mode
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