HD6475328CG Datasheet, PDF (18/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

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Shift Instructions ··············································································································55
Bit-Manipulation Instructions ··························································································56
Branching Instructions ·····································································································57
System Control Instructions ····························································································59
Short-Format Instructions and Equivalent General Formats ···········································62
Exceptions and Their Priority ··························································································81
Instruction Exceptions ······································································································81
Exception Vector Table ····································································································84
Stack after Exception Handling Sequence ·······································································94
Interrupt Controller Registers ··························································································99
Interrupts, Vectors, and Priorities ··················································································102
Assignment of Interrupt Priority Registers ····································································103
Number of States before Interrupt Service ····································································111
Internal Control Registers of the DTC ···········································································114
Data Transfer Enable Registers ·····················································································115
Assignment of Data Transfer Enable Registers ·····························································117
Addresses of DTC Vectors ·····························································································121
Number of States per Data Transfer ··············································································123
Number of States before Interrupt Service ····································································124
DTC Control Register Information Set in RAM ···························································125
Register Configuration ···································································································128
Wait Modes ····················································································································130
External Crystal Parameters ··························································································136
Input/Output Port Summary ··························································································140
Port 1 Registers ··············································································································142
Port 1 Pin Functions in Expanded Modes ······································································145
Port 1 Pin Functions in Single-Chip Modes ··································································147
Port 2 Registers ··············································································································149
Port 3 Registers ··············································································································152
Port 4 Registers ··············································································································155
Port 5 Registers ··············································································································158
Status of MOS Pull-Ups for Port 5 ················································································161
Port 6 Registers ··············································································································164
Status of MOS Pull-Ups for Port 5 ················································································167
Port 7 Registers ··············································································································168
Port 7 Pin Functions ·······································································································170
Port 8 Registers ··············································································································172
Port 9 Registers ··············································································································173
Port 9 Pin Functions ·······································································································175
Input and Output Pins of Free-Running Timer Module ················································179
Register Configuration ···································································································180