HD6475328CG Datasheet, PDF (399/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

TCR—Timer Control Register
H'FFD0
TMR
Bit
Initial value
Read/Write
7
CMIEB
0
R/W
6
CMIEA
0
R/W
5
OVIE
0
R/W
4
3
CCLR1 CCLR0
0
0
R/W R/W
2
CKS2
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
Clock Select
0 0 0 No clock source; timer stops.
0 0 1 Internal clock source: ø8,
counted on falling edge.
0 1 0 Internal clock source: ø64,
counted on falling edge.
0 1 1 Internal clock source: ø1024,
counted on falling edge.
1 0 0 No clock source; timer stops.
1 0 1 External clock source, counted
on rising edge.
1 1 0 External clock source, counted
on falling edge.
1 1 1 External clock source, counted
on both rising and falling edges.
Counter Clear
0 0 Counter is not cleared.
0 1 Cleared by compare-match A.
1 0 Cleared by compare-match B.
1 1 Cleared on rising edge of external reset input.
Timer Overflow Interrupt Enable
0 Overflow interrupt request is disabled.
1 Overflow interrupt request is enabled.
Compare-Match Interrupt Enable A
0 Compare-match A interrupt request is disabled.
1 Compare-match A interrupt request is enabled.
Compare-Match Interrupt Enable B
0 Compare-match B interrupt request is disabled.
1 Compare-match B interrupt request is enabled.
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