HD6475328CG Datasheet, PDF (280/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Transmission direction
Serial clock
Data
Bit 0
Bit 1
Don’t-care
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6 Bit 7
Don’t-care
Figure 14-4 Data Format in Synchronous Mode
2. Clock: Either the internal serial clock created by the on-chip baud rate generator or an external
clock input at the SCK pin can be selected in the synchronous mode. See table 14-6 for details.
3. Data Transmission and Reception
• SCI Initialization: Before data can be transmitted or received, the SCI must be initialized
by software. To initialize the SCI, software must clear the TE and RE bits to 0 to disable
both the transmit and receive functions, then execute the following procedure.
(1) Write the value corresponding to the desired bit rate in the BRR. (This step is not
necessary if an external clock is used.)
(2) Select the clock in the SCR.
(3) Select the synchronous mode in the SMR*.
(4) Set the TE and/or RE bit to 1, and enable desired interrupts in the SCR.
The TE and RE bits must both be cleared to 0 whenever the operating mode or data format is
changed. After changing the operating mode or data format, before setting the TE and RE bits
to 1 software must wait for at least 1 bit transfer time at the selected communication speed, to
make sure the SCI is initialized.
* The SCK pin is used for input or output according to the C/A bit in the serial mode register
(SMR) and the CKE0 and CKE1 bits in the serial control register (SCR). (See table 14-6.)
To prevent unwanted output at the SCK pin, pay attention to the order in which you set SMR
and SCR.
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