HD6475328CG Datasheet, PDF (336/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

20.3.1 Bus Timing
1. Basic Bus Cycle (without Wait States) in Expanded Modes
ø
A19 to A0
R/W
AS,
DS (Read),
RD
D7 to D0
(Read)
DS (Write),
WR
D7 to D0
(Write)
T1
tcyc
tCH
tCL
tAD
tCf
T2
tCr
tAS1
tDSD1
tAS2
tACC
tDSD2
tWDD
tWDS
T3
tRDS
tDSD3
tAH
tRDH
tDSD3
tDSWW
tAH
tWDH
Figure 20-4 Basic Bus Cycle (without Wait States) in Expanded Modes
327