HD6475328CG Datasheet, PDF (256/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

H’FF
TCNT
count
H’00
Time t
WT/IT = 1
TIME = 1
H'00 written
to TCNT
OVF = 1
NMI requested
Figure 13-3 Operation in Watchdog Timer Mode
13.3.2 Interval Timer Mode
Interval timer operation begins when the WT/IT bit is cleared to 0 and the TME bit is set to 1.
In the interval timer mode, an IRQ0 request is generated each time the timer count overflows.
This function can be used to generate IRQ0 requests at regular intervals. See figure 13-4.
IRQ0 requests from the watchdog timer module have the same vector as IRQ0 requests from the
IRQ0 pin, so the IRQ0 interrupt-handling routine must check the OVF bit in the TCSR to
determine the source of the interrupt.
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