HD6475328CG Datasheet, PDF (299/459 Pages) Hitachi Semiconductor – Manual Gives a Hardware Description

Note on Scan Mode: If the ADST bit is cleared to 0 while two or more channels are being
converted in scan mode, incorrect values may be set in the A/D data registers.
This problem is limited to ZTAT versions. It does not occur in versions with masked ROM.
Solution: Read the A/D data registers only when the ADST bit is set to 1.
Example:
MOV.B #5B ,@ADCSR ; 4-channel scan mode
BSET.B #5 ,@ADCSR ; Start conversion (set ADST)
<A/D conversion continues>
ADI: MOV.W @ADDRA , R0
; read ADDRA
MOV.W @ADDRB , R1
; read ADDRB
MOV.W @ADDRC , R2
; read ADDRC
MOV.W @ADDRD , R3
; read ADDRD
BCLR.B #5
, @ADCSR ; clear ADST
BCLR.B #7
, @ADCSR ; clear ADF
The A/D data registers should be read before ADST is cleared, as in the preceding example. (It is
not necessary to clear ADST in order to read the A/D data registers.)
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